发布日期: 2025-09-16

更新日期: 2025-09-17

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2025-09-16 更新

Optimizing Inter-chip Coupler Link Placement for Modular and Chiplet Quantum Systems

Authors:Zefan Du, Pedro Chumpitaz Flores, Wenqi Wei, Juntao Chen, Kaixun Hua, Ying Mao

Quantum computing offers unparalleled computational capabilities but faces significant challenges, including limited qubit counts, diverse hardware topologies, and dynamic noise and error rates, which hinder scalability and reliability. Distributed quantum computing, particularly chip-to-chip connections, has emerged as a solution by interconnecting multiple processors to collaboratively execute large circuits. While hardware advancements, such as IBM’s Quantum Flamingo, focus on improving inter-chip fidelity, limited research addresses efficient circuit cutting and qubit mapping in distributed systems. This project introduces InterPlace, a self-adaptive, hardware-aware framework for chip-to-chip distributed quantum systems. InterPlace analyzes qubit noise and error rates to construct a virtual system topology, guiding circuit partitioning and distributed qubit mapping to minimize SWAP overhead and enhance fidelity. Implemented with IBM Qiskit and compared with the state-of-the-art, InterPlace achieves up to a 53.0% improvement in fidelity and reduces the combination of on-chip SWAPs and inter-chip operations by as much as 33.3%, demonstrating scalability and effectiveness in extensive evaluations on real quantum hardware topologies.

量子计算提供了无与伦比的计算能力，但面临着巨大的挑战，包括有限的量子比特数量、各种硬件拓扑结构和动态噪声和错误率，这些挑战阻碍了其可扩展性和可靠性。分布式量子计算，特别是芯片间连接，通过互联多个处理器来协同执行大型电路，成为了一种解决方案。虽然硬件发展（如IBM的量子火焰舞）的重点是提高芯片间的保真度，但关于分布式系统中高效电路切割和量子比特映射的研究有限。本项目引入了InterPlace，这是一个用于芯片间分布式量子系统的自适应、硬件感知框架。InterPlace分析量子比特的噪声和错误率来构建虚拟系统拓扑结构，指导电路分区和分布式量子比特映射，以最小化SWAP开销并增强保真度。通过IBM Qiskit实现并与最新技术进行比较，InterPlace的保真度提高了高达53.0%，并且在真实量子硬件拓扑结构的广泛评估中，减少了芯片上SWAP和跨芯片操作的组合高达33.3%，证明了其在可扩展性和有效性方面的优势。

论文及项目相关链接

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Summary

量子计算拥有无与伦比的计算能力，但面临诸多挑战，如有限的量子比特数量、多样的硬件拓扑结构和动态的噪声与错误率，阻碍了其可扩展性和可靠性。分布式量子计算通过连接多个处理器来协同执行大型电路，作为解决方案之一脱颖而出。一个名为InterPlace的硬件感知型自适应框架被引入用于处理芯片间的分布式量子系统。它通过分析量子比特的噪声和错误率来构建虚拟系统拓扑结构，指导电路分区和分布式量子比特映射，以最小化SWAP开销并增强保真度。与现有技术相比，通过IBM Qiskit实现的InterPlace在真实量子硬件拓扑结构上的广泛评估中，实现了高达53.0%的保真度提升，并将芯片内SWAP和跨芯片操作组合减少了高达33.3%，证明了其在可扩展性和有效性方面的优势。

Key Takeaways